![]() ![]() Forming different segments for data, code, and stack, and preventing their overlapping.Several additional instructions were introduced in the protected mode of 80286, which are helpful for multitasking operating systems.Īnother important feature of 80286 is the prevention of unauthorized access. This would allow IBM compatibles to have advanced multitasking OSes for the first time and compete in the Unix-dominated server/ workstation market. In addition, it was the first commercially available microprocessor with on-chip MMU capabilities (systems using the contemporaneous Motorola 68010 and NS320xx could be equipped with an optional MMU controller). The 286 was the first of the x86 CPU family to support protected virtual-address mode, commonly called " protected mode". IBM 80286 (8 MHz version) Protected mode Additionally, there was a performance penalty involved in accessing extended memory from real mode as noted below. However, memory cost and the initial rarity of software using the memory above 1 MB meant that until late in its production 80286 computers rarely shipped with more than one megabyte of RAM. It was the first x86 processor to support virtual memory supporting up to 1 GB via segmentation. The Intel 80286 had a 24-bit address bus and as such had a 16 MB physical address space, compared to the 1 MB address space of prior x86 processors. Some of the instructions for protected mode can (or must) be used in real mode to set up and switch to protected mode, and a few (such as SMSW and LMSW) are useful for real mode itself. The 80286 also added new instructions for protected mode: ARPL, CLTS, LAR, LGDT, LIDT, LLDT, LMSW, LSL, LTR, SGDT, SIDT, SLDT, SMSW, STR, VERR, and VERW. The 80286 included, in addition to all of the 8086 instructions, all of the new instructions of the 80186: ENTER, LEAVE, BOUND, INS, OUTS, PUSHA, POPA, PUSH immediate, IMUL immediate, and immediate shifts and rotates. Also, the 80286 was more efficient in the prefetch of instructions, buffering, execution of jumps, and in complex microcoded numerical operations such as MUL/ DIV than its predecessor. They were performed by a dedicated unit in the 80286, while the older 8086 had to do effective address computation using its general ALU, consuming several extra clock cycles in many cases. This was partly due to the non-multiplexed address and data buses, but mainly to the fact that address calculations (such as base index) were less expensive. This was a large increase, fully comparable to the speed improvements seven years later when the i486 (1989) or the original Pentium (1993) were introduced. ![]() The performance increase of the 80286 over the 8086 (or 8088) could be more than 100% per clock cycle in many programs (i.e., a doubled performance at the same clock speed). It was produced in a 68-pin package, including PLCC ( plastic leaded chip carrier), LCC ( leadless chip carrier) and PGA ( pin grid array) packages. It had 134,000 transistors and consisted of four independent units: the address unit, bus unit, instruction unit, and execution unit, organized into a loosely coupled (buffered) pipeline, just as in the 8086. The CPU was designed for multi-user systems with multitasking applications, including communications (such as automated PBXs) and real-time process control. Intel did not expect personal computers to use the 286. ![]() Intel second sourced this microprocessor to Fujitsu Limited around 1985. This E-2 stepping part may have been available in later 1986. The later E- stepping level of the 80286 was free of the several significant errata that caused problems for programmers and operating-system writers in the earlier B-step and C-step CPUs (common in the AT and AT clones). The 6 MHz, 10 MHz, and 12 MHz models were reportedly measured to operate at 0.9 MIPS, 1.5 MIPS, and 2.66 MIPS respectively. On average, the 80286 was reportedly measured to have a speed of about 0.21 instructions per clock on "typical" programs, although it could be significantly faster on optimized code and in tight loops, as many instructions could execute in 2 clock cycles each. Intersil and Fujitsu also designed fully static CMOS versions of Intel's original depletion-load nMOS implementation, largely aimed at battery-powered devices. AMD and Harris later produced 16 MHz, 20 MHz and 25 MHz parts, respectively. IntelThe 8086 Family User's Man\ual October 1979.Intel's first 80286 chips were specified for a maximum clockrate of 5, 6 or 8 MHz and later releases for 12.5 MHz. ![]()
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